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General Summary:
Job Overview
• The candidate will be part of the SOC Infrastructure IP Performance modelling and analysis team (Bangalore), working on performance analysis on Pre and Post silicon platforms.
• In this role you will need drive the validation and debug strategy and methodology to establish a next level of excellence in post silicon performance analysis.
• Candidates need to work closely with IP architects and understand the feature design/arch and define the process/methodology for feature studies.
• He/she is also responsible to drive the analysis and help the architecture teams to enable the next level of features for upcoming architecture.
• Candidate is responsible of lab equipment handling, forecast, purchases, handling inventory with optimized resources usage.
• The profile is not limited with only performance also the scope extends to power measurements on reference platforms, feature level power analysis and debugs.
• Candidates need to provide direction and goals to the team and interact with stakeholders both internal and external.
• Works with peer orgs for feature enablement, system level dependencies, coverage analysis/review & sighting management.
• Candidate responsible for continuously drives improvement in validation methods, tools, cycle time and test contents optimization.
Minimum Qualifications
• Bachelor’s degree in engineering, Information Systems, Computer Science, or related field.
• 8+ years Hardware Engineering experience or related work experience.
Preferred Qualifications
• Master or Bachelor of Engineering degree in Electronics or Computer Engineering with 2-4 years' experience in post silicon functional validation/performance and power measurements, Should have understanding of Computer architecture, mobile SOC ARCH. Experience with industry standard automation and scripting (C/C++/Shell programming/PERL/Python), Experience with the lab hardware equipment like DAQ, T32 devices (JTAG), and associated interfaces required to validate performance monitoring counters and Android test cases. Good analytical ability, problem solving and communication skills.
• Self-Driven and a passion for continuous improvement of validation methodologies debug techniques.
• Demonstrated skills for Project planning for post silicon from bring-up to PRQ and Post launch Support
• Understand the Product Lifecycle's and various phases of validation from Simulation/Emulation to Post Silicon
• Ability to drive Post Silicon performance analysis and report out the observations to wider forum.
• Sound knowledge of Linux, Android basics, workload characterization.
• Ability to Define/Drive test scenarios, write test cases, validate system level new features, regressions execution, track/analyze failures and debug.
• Review bugs, retrospective of bug escapes and propose methods to catch bugs early
• Analyze impact on performance/power and drive the fixes/workarounds as per project milestone priorities
• Understand usage models (driver) and bring in scenarios early in emulation to validate to minimize escapes
• Own, scope and drive the development of post-silicon verification test plans for units in DDR, Cache controllers
• Collaboratively work with the partner teams from design Software, SW build teams, to quickly root cause the performance issues.
• Independently work with architects/designers/pre-si validation/tech leads/SW driver team/SW-simulation/Emulation teams in driving the test plan reviews, and bug fixes to closure.
• Interface with cross-site functional teams in different time zones to drive the validation.
Education Requirements
Required: Bachelor's, Electrical Engineering
Preferred: Master in Electrical Engineering/Computer Science Engineering
Minimum Qualifications:
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