Silicon Design Engineer (RTL)

Project description We are looking for a Silicon Design Engineer with RTL design & development experience. Responsibilities Design and implement FPGA solutions using VHDL/Verilog on Xilinx platforms, ensuring optimal performance and resource utilization. Develop and integrate high-speed interfaces such as Ethernet, PCIe, SPI, I2C, USB, GPIO, and memory subsystems (DDR/SDRAM/DMA). Perform hardware validation and testing using lab equipment (logic analyzers, traffic generators, etc.) to verify design functionality. Debug and troubleshoot issues at the device and board level, ensuring reliable system performance. Develop automation scripts (Python/Perl/TCL) and collaborate with cross-functional teams to streamline workflows and resolve complex problems. Skills Must have 5-10y exp Strong experience in FPGA design using VHDL/Verilog with Xilinx tools and technologies Hands-on experience with high-speed interfaces: Ethernet, PCIe, SPI, I2C, USB, GPIO, DDR/SDRAM/DMA Proficiency in hardware validation and testing using lab equipment (logic/traffic analyzers, test generators) Strong debugging skills at the device and board level Experience in scripting (Python/Perl/TCL) Nice to have Good problem-solving and communication skills Other Languages English: B2 Upper Intermediate Seniority Senior