الوصف الوظيفي
Job Title: Design & Verification Engineer Location: Noida Looking for Siemens EDA ambassadors: Verifications of internally developed VTL (Veloce friendly standard protocols eg. AMBA, PCIe, SAS, Ethernet, MIPI etc) using standard verification methodologies including UVM and signoff based on coverage matrix. Job Description - 1. Development of verification environments using standard verification methodologies on standard protocol like PCIe/SAS/SATA etc 2. Verification at IP level to ensure 100% Functional and Code Coverage 3. Suggest and prototype various verifications flows using Veloce 4. Integration and qualification of various VTLs with Questa Based Verification IPs using 5. Customer use model within internal test suites a. May requires interfaces with customers and travel to customer sites 6. Development of methodology suites and automating the same Skill Sets Required: Protocol / Practical experience on any of the following protocol is necessary – a. AMBA b. PCI/PCIe c. SAS d. Ethernet e. MIPI 1. B.Tech/M.Tech in ECE, EE, VLSI with 2-5 years of experience 2. Experience in IP and SOC level verification 3. Knowledge of verification methodologies like Specman, SV,UVM, OVM, TLM, Assertion, Coverage, co-simulation, co-verification 4. Good communication skills as person needs to work with external interfaces 5. FPGA/Emulation experience is high positive 6. Good scripting and automation knowledge is big plus for the role Education Graduate / Post Graduate (Bachelors/Masters) in Computer Science / Electronics & Electronics (EEE) / Electronics & Communication Engineering (ECE). #LI-EDA #Onsite
لقد تمت ترجمة هذا الإعلان الوظيفي بواسطة الذكاء الاصطناعي وقد يحتوي على بعض الاختلافات أو الأخطاء البسيطة.
